FIFO

FIFO:

FIFO stands for First In First Out.

The process of writing in FIFO is called Push.

The process of reading out of FIFO is called Pop.

Types of FIFO:

i.  Synchronous FIFO

ii. Asynchronous FIFO

Empty & Full Condition:

Empty Condition:

wrptr = rdptr

Full Condition:

wrptr = 1 1 1 + 1 = 1 0 0 0

rdptr                    = 0 0 0 0

  

{~wrptr[3] , wrptr [2:0]} = {rdptr[3:0]}   

FIFO Depth Calculation:

CASE I : NO IDLE CYCLE

Given,

Writing Frequency (FA)  = 100 MHz

Reading Frequency (RD) = 50  MHz

Burst Length = No of data item to be transferred  = 100

Calculate the minimum depth of the FIFO.

1. Time required to write one data item = 1/100 * 1000  = 10 ns

2. Time required to write  all data in the burst = (100*10) = 1000 ns

3. Time required to read one data item = 1/50 * 1000 = 20 ns

4. The number of data item that can be read in a duration of 1000 ns = 1000ns/20ns = 50

5. The remaining of bytes to be stored in the FIFO = 100 -50 = 50

Therefore, the FIFO depth in the scenario is of 50 data items.

CASE II: WITH IDLE CYCLE

Given,

Writing Frequency (FA)  = 100 MHz

Reading Frequency (RD) = 50  MHz

Burst Length = No of data item to be transferred  = 100

1 idle cycle between write.

3 idle cycle between read.

Calculate the minimum depth of the FIFO.

1. Time required to write one data item = 1/100 * 1000  = 10 ns  = 2*10 ns = 20 ns                                   2. Time required to write  all data in the burst = (100*20) = 2000 ns

3. Time required to read one data item = 1/50 * 1000 = 20 ns  = 4*20 ns = 80 ns

4. The number of data item that can be read in a duration of 2000 ns = 2000ns/80ns = 25

5. The remaining of bytes to be stored in the FIFO = 100 - 25 = 75

Therefore, the FIFO depth in the scenario is of 75 data items.

1. Synchronous FIFO 

In Synchronous FIFO, data read and write operations happens on the same clock frequency.

Full Condition

{~wrptr [3], wrptr[2:0]} = {rdptr[3:0]}

Empty Condition

wrptr [3:0] = rdptr [3:0]

Generating wren for sync fifo:

II. Asynchronous FIFO

Empty Condition

{wrptr_sync [3:0] == rd_ptr [3:0]}

Full Condition

{wr_ptr [3], wr_ptr [2:0] == rdptr_sync [3:0]}